1. Field of the Invention
The present invention relates generally to methods for forming field effect transistor (FET) devices. More particularly, the present invention relates to methods for forming field effect transistor (FET) devices with enhanced performance.
2. Description of the Related Art
Common in the semiconductor product fabrication art is the fabrication and use of field effect transistor devices as switching devices within logic semiconductor products, memory semiconductor products and embedded logic and memory semiconductor products.
While field effect transistor devices are thus common in the semiconductor product fabrication art and often essential for fabricating semiconductor products, field effect transistor devices are nonetheless not entirely without problems.
In that regard, as semiconductor product integration levels have increased and semiconductor device dimensions have decreased, it has become increasingly difficult to form within semiconductor products field effect transistor devices with enhanced performance.
It is thus desirable in the semiconductor product fabrication art to fabricate field effect transistor devices with enhanced performance.
It is towards the foregoing object that the present invention is directed.
Various methods have been disclosed within the semiconductor product fabrication art for forming field effect transistor devices with desirable properties.
Included but not limiting among the methods are those disclosed within: (1) Yeh et al., in U.S. Pat. No. 5,393,686 (a halogen gettering method for forming within a field effect transistor device a gate dielectric layer such as to form the field effect transistor device with enhanced performance); and (2) Grider et al., in U.S. Pat. No. 6,093,659 (a halogen doping method for forming within a semiconductor substrate a pair of gate dielectric layers with differing thicknesses such as to provide a pair of field effect transistor devices with differing performance properties).
Desirable in the semiconductor product fabrication art are additional methods for forming field effect transistor devices with enhanced performance.
It is towards the foregoing object that the present invention is directed.